Author Archives: Admin

Build an Internet router and learn about clean-slate switches in a 5-day spring school will be held at Poznan University of Technology in Poznań, Poland.

This event will be like previous summer-school events but, excitingly, will be the first NetFPGA event to exclusively use the new NetFPGA 10G boards.

The NetFPGA platform originated at Stanford University and more-recently updated NetFPGA (10Gb/s) have been developed in collaboration with Cambridge University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.

More details on this event on the NetFPGA event website.

The 2nd Face-to-Face meeting took place on 26-27 March 2013 in Berlin Institute of Technology (TU Berlin) premises and was hosted by EICT. The meeting’s purpose was to make agreement on some architecture assumptions, work organization and next steps  to be done. All work packages have presented the current work progress and the most important issues to be discussed. During the meeting the discussions have conducted on how the Hardware Abstraction Layer should be placed on the different Hardware Platforms. Another discussed issue was to how integrate the ALIEN hardware platforms with the OFELIA Control Framework together with specifying some technical details e.g. the OpenFlow version to be supported. The important issue that was discussed during the F2F meeting were the Experiments on OFELIA and ALIEN hardware. During the meeting the agreement of all ALIEN consortium partners was taken and action points as well as important steps to be done in near future have been defined. The meeting has also scoped on most important administrative and financial issues.

Overview

Workshop goals

• present an overview of network processors available on the market
• present and discuss an architecture, programming model and development tools of EZchip and Octeon network processors
• present the Dell’s Split Data Plane concept

After this workshop each participant will gather necessary knowledge to choose a suitable network processor for a given application. The participant will be also familiar with the architecture and capabilities of EZchip and Octeon network processors and will learn how to develop advanced network applications using thier features. As a complementary item in the agenda, the Dell’s Split Data Plane concept will be presented and discussed as a potential solution for heterogeneous devices combining the advantages of presented circuits.

Workshop venue

tubIT
Meeting Room: EN0.58
IT-Service-Center an der TUB
Einsteinufer 17 / stairs D („Treppe D“)
10587 Berlin

Directions: You are in front of the Institute of Architecture (building 6 in the sketch above). Turn right into Straße des17.Juni and take the next possible entrance left. Head straight over the campus to building 10 (EN), recognizable by its aluminum façade.

How to arrive

By plane

Arrival at Berlin-Tegel Airport (TXL)

Take the X9 bus, heading for Zoologischer Garten. Get out at the U-Bahnhof Ernst-Reuter-Platz stop. From the bus stop, follow the roundabout of Ernst-Reuter-Platz in counter-clockwise direction and cross two big streets: Hardenbergstraße and Straße des 17. Juni. Follow the arrow in the picture.

Arrival at Berlin-Schönefeld Airport (SXF)

Take the transfer bus, or bus 171 to S-Bahnhof Schönefeld and take the Regionalexpress or take the S9 train, heading for Westkreuz. Get out at Zoologischer Garten. Either take the U2, heading for Ruhleben, or take the bus M45, 245 or X9 the very short distance to Ernst-Reuter-Platz.

By car

If you are coming to Berlin by car, it’s best to take the A100. From exit (Ausfahrt) no. 8 “Kaiserdamm Süd”, you normally need about 10 minutes to drive along the Kaiserdamm / Bismarckstraße to Ernst-Reuter-Platz. Take the third exit in the roundabout (Marchstraße) and follow the street until you get to a traffic light in front of a bridge. Turn right into Einsteinufer and follow to number 17.

By train

Arrival at Zoologischer Garten station

Take the underground U2, heading for Ruhleben, one stop to Ernst-Reuter-Platz. You can also take a bus M45, 245 or X9.

Arrival at Hauptbahnhof (central station)

From Hauptbahnhof you can take any S train heading for Zoologischer Garten, where you get out. Take the underground U2, heading for Ruhleben, one stop to Ernst-Reuter-Platz.

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